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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AD7533_01 데이터 시트보기 (PDF) - Intersil

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AD7533_01 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
AD7523, AD7533
±10V +15V
VREF
R1
R2
MSB
15
4
14
16
RFEEDBACK
DATA
INPUTS
AD7523/ 1 IOUT1
AD7533
-
IOUT2 R4 5K
R3 5K
13 3 2
LSB
CR1
6
+
R6 10M
-
CR2
6
+
VOUT
FIGURE 3. BIPOLAR OPERATION (4-QUADRANT MULTIPLICATION)
TABLE 4. UNlPOLAR BINARY CODE - AD7533
DIGITAL INPUT
MSB LSB
(NOTE 14)
NOMINAL ANALOG OUTPUT
1111111111
-
VR
E
F
55----11---12--
1000000001
-
VR
E
F
5----11---2--
1000000000
0
0111111111
+
VRE
F
5----11---2--
0000000001
+
VRE
F
55----11---12--
0000000000
+
VRE
F
55----11---22--
NOTES:
14. VOUT as shown in Figure 3.
15. Nominal Full Scale for the circuit of Figure 3 is given by:
FSR
=
VR
E
F
1--5--0-1--2--2-3--
.
16. Nominal LSB magnitude for the circuit of Figure 3 is given by:
LSB
=
V
R
E
F
5----11---2--
.
Offset Adjustment
5. Adjust VREF to approximately +10V.
6. Connect all digital inputs to “Logic 1”.
7. Adjust IOUT2 amplifier offset adjust trimpot for 0V ±1mV at
IOUT2 amplifier output.
8. Connect MSB (Bit 1) to “Logic 1” and all other bits to
“Logic 0”.
9. Adjust IOUT1 amplifier offset adjust trimpot for 0V ±1mV at
VOUT.
Gain Adjustment
1. Connect all digital inputs to V+.
2. Monitor VOUT for a -VREF (1 - 2-9) volts reading.
3. To increase VOUT, connect a series resistor (R2) of up to
250between VOUT and RFEEDBACK.
4. To decrease VOUT , connect a series resistor (R1) of up to
250between the reference voltage and the VREF
terminal.
6

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