74ABT373CPC 데이터 시트보기 (PDF) - Fairchild Semiconductor

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74ABT373CPC

Octal Transparent Latch with 3-STATE Outputs

Fairchild Semiconductor 

Functional Description

Truth Table

The ABT373 contains eight D-type latches with 3-STATE

output buffers. When the Latch Enable (LE) input is HIGH,

Inputs

data on the Dn inputs enters the latches. In this condition

the latches are transparent, i.e., a latch output will change

LE

OE

Dn

state each time its D input changes. When LE is LOW, the

H

L

H

latches store the information that was present on the D

inputs at setup time preceding the HIGH-to-LOW transition

H

L

L

of LE. The 3-STATE buffers are controlled by the Output

L

L

X

Enable (OE) input. When OE is LOW, the buffers are in the

bi-state mode. When OE is HIGH the buffers are in the high

X

H

X

impedance mode but this does not interfere with entering

new data into the latches.

H HIGH Voltage Level

L LOW Voltage Level

X Immaterial

Z HIGH Impedance State

Logic Diagram

Output

On

H

L

On (no change)

Z

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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