74LVQ163M 데이터 시트보기 (PDF) - STMicroelectronics
부품명
상세내역
제조사
74LVQ163M Datasheet PDF : 13 Pages
| |||
74LVQ163
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns)
Test Condition
Value
Symbol
Parameter
VCC
(V)
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
tPLH tPHL Propagation Delay 2.7
Time CK to Q
3.3(*)
7.5 12.0
6.3 9.5
15.0
11.0
17.0
ns
12.5
tPLH tPHL Propagation Delay 2.7
Time CK to CARRY
OUT
3.3(*)
8.8 14.0
7.1 10.5
16.0
12.0
18.5
ns
14.0
tPLH tPHL Propagation Delay 2.7
Time TE to CARRY
OUT
3.3(*)
6.1 10.0
11.5
13.0
5.2 8.0
ns
9.5
10.5
tW CK pulse Width,
(Count) High or
LOW
2.7
3.3(*)
4.0 1.9
4.0
4.0
ns
3.0 1.9
3.0
3.0
tW CK pulse Width,
(Load) High or
LOW
2.7
3.3(*)
4.0 1.9
4.0
4.0
ns
3.0 1.9
3.0
3.0
ts
Setup Time HIGH 2.7
or LOW
(INPUT to CLOCK)
3.3(*)
5.0 2.5
5.0
5.0
ns
4.0 2.1
4.0
4.0
th Hold Time HIGH or 2.7
LOW
(INPUT to CLOCK)
3.3(*)
1 -1.6
1
1
ns
0.5 -1.2
0.5
0.5
ts
Setup Time HIGH 2.7
or LOW (CLEAR
to CLOCK)
3.3(*)
3.0 1.5
3.0
3.0
ns
2.5 1.2
2.5
2.5
th Hold Time HIGH or 2.7
LOW (CLEAR
to CLOCK)
3.3(*)
1 -0.6
1
1
ns
0.5 -0.5
0.5
0.5
ts
Setup Time HIGH 2.7
or LOW (LOAD to
CLOCK)
3.3(*)
8.0 3.7
8.0
8.0
ns
6.0 3.2
6.0
6.0
th Hold Time HIGH or 2.7
LOW (LOAD to
CLOCK)
3.3(*)
0 -3.0
0
0 -2.5
0
0
ns
0
ts
Setup Time HIGH 2.7
or LOW (PE or TE
to CLOCK)
3.3(*)
7.0 3.4
7.0
7.0
ns
6.0 3.0
6.0
6.0
th Hold Time HIGH or 2.7
LOW (PE or TE
to CLOCK)
3.3(*)
0 -2.6
0
0 -2.2
0
0
ns
0
fMAX Maximum Clock
Frequency
2.7
3.3(*)
100 150
80
120 180
100
60
MHz
80
tOSLH
tOSHL
Output To Output
Skew Time
(note1, 2)
2.7
3.3(*)
0.5 1.0
1.0
1.0
0.5 1.0
1.0
1.0 ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tPHLn|)
2) Parameter guaranteed by design
(*) Voltage range is 3.3V ± 0.3V
7/13
Share Link: 