LTC1406
TYPICAL PERFORMANCE CHARACTERISTICS
Spurious-Free Dynamic Range
vs Input Frequency
70
60
50
40
30
20
10
0
100k
1M
10M
INPUT FREQUENCY (Hz)
100M
1406 G04
Integral Nonlinearity
vs Output Code
1.0
0.5
0
–0.5
–1.0
0
32 64 96 128 160 192 224 256
OUTPUT CODE
1406 G07
Intermodulation Distortion Plot
0
–10
fSAMPLE = 20MHz
fIN1 = 3.500977MHz
–20
fIN2 = 3.598633MHz
–30
–40
–50
–60
–70
–80
–90
–100
0 1 2 3 4 5 6 7 8 9 10
FREQUENCY (MHz)
1406 G05
Input Common Mode Rejection
vs Input Frequency
70
60
50
40
30
20
10
0
100k
1M
10M
INPUT FREQUENCY (Hz)
100M
1406 G08
Differential Nonlinearity
vs Output Code
1.0
0.5
0
–0.5
–1.0
0
32 64 96 128 160 192 224 256
OUTPUT CODE
1406 G06
Supply Current vs
Sampling Frequency
35
30
25
20
15
10
5
0
100k
1M
10M 20M
SAMPLING FREQUENCY (Hz)
1406 G09
PIN FUNCTIONS
OGND (Pin 1): Digital Data Output Ground. Tie to analog
ground plane. May be tied to logic ground if desired.
OVDD (Pin 2): Digital Data Output Supply. Normally tied to
5V, can be used to interface with 3V digital logic. Bypass
to OGND with 10µF tantalum in parallel with 0.1µF or 10µF
ceramic.
SHDN (Pin 3): Power Shutdown Input. Logic low selects
shutdown.
VBIAS (Pin 4): Internal Bias Voltage. Internally set to 2.2V.
Bypass to analog ground plane with 10µF tantalum in par-
allel with 0.1µF or 10µF ceramic.
VREF (Pin 5): External 2.5V Reference Input. Bypass to
analog ground plane with 10µF tantalum in parallel with
0.1µF or 10µF ceramic.
AGND (Pin 6): Analog Ground. Tie to analog ground plane.
AIN+ (Pin 7): ±1V Input. The maximum output code
occurs when [(AIN+) – (AIN–)] = 1V. The minimum output
code occurs when [(AIN+) – (AIN–)] = – 1V.
AIN– (Pin 8): ±1V Input. The maximum output code
occurs when [(AIN+) – (AIN–)] = 1V. The minimum output
code occurs when [(AIN+) – (AIN–)] = – 1V. For single-
ended operation, tie AIN– to a DC voltage (e.g., VREF).
5