8408 데이터 시트보기 (PDF) - MAXWELL TECHNOLOGIES
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8408 Datasheet PDF : 20 Pages
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Quad 8-Bit Multiplying CMOS
D/A Converter with Memory
1. This is an end-point linearity specification.
2. Guaranteed to be monotonic over the full operating temperature range.
3. ppm/°C of FSR (FSR = Full Scale Range = VREF -1 LSB).
4. Guaranteed by design.
5. All Digital Inputs = 0V; VREF = +10V.
6. Logic Inputs are MOS gates. Typical input current at +25°C is less than 10 nA.
7. From Digital Input to 90% of final analog output current.
8. Digital Inputs = 0V to VDD or VDD to 0V.
9. Extrapolated: ts (1/2 LSB) = tPD + 6.2τ where τ = the measured first constant of the final RC decay.
10.See Timing Diagram
11. All Digital Inputs “0” or VDD.
12.All Digital Inputs VIH or VIL
8408
08.20.02 REV 1
All data sheets are subject to change without notice 5
©2002 Maxwell Technologies
All rights reserved.
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