SI4785 데이터 시트보기 (PDF) - Silicon Laboratories

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SI4785

Si47XX ANTENNA, SCHEMATIC, LAYOUT, AND DESIGN GUIDELINES

Silicon Laboratories 

AN383

4.4. Cable Antenna Layout

Place the chip as close to the cable antenna as possible. This will minimize the trace length going to the cable

antenna which will minimize the parasitic capacitance. Place the shunt ferrite for the ground return current as close

to the cable as possible. Putting the shunt ferrite for the ground return current close to the cable ensures that the

ground return current has minimal loop which will reduce noise coupling. The series ferrites also should be put as

close as possible to the cable. This will minimize the parasitic capacitance seen by the FMI pin.

4.5. Cable Antenna Design Checklist

 Place the chip as close as possible to the cable antenna to minimize parasitic capacitance.

 Place the tuning inductor, L1, as far away from noise sources as possible.

 Make sure that the shunt ferrite has a dc rating that exceeds the expected max ground return current of the

cable.

 Place the shunt ferrite close to the cable.

 Choose series ferrite that is appropriate for each type of signal in the conductor.

 Place the series ferrite(s) close to the cable.

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