FM3104 데이터 시트보기 (PDF) - Ramtron International Corporation

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FM3104

Integrated Processor Companion with Memory

Ramtron International Corporation 

By Master

Start

Address

S

Slave Address 1 A

FM3104/16/64/256

No

Acknowledge

Stop

Data Byte

1P

By FM31xxx

Acknowledge Data

Figure 13. Current Address Memory Read

By Master

Start

Address

S

Slave Address 1 A

Acknowledge

No

Acknowledge

Data Byte

A

Data Byte

1P

Stop

By FM31xxx

Acknowledge

Data

Figure 14. Sequential Memory Read

Start

By Master

Address

S

Slave Address 0 A

Address MSB

A

Address LSB

Start

Address

AS

Slave Address 1 A

By FM31xxx

Acknowledge

Figure 15. Selective (Random) Memory Read

No

Acknowledge

Stop

Data Byte

1P

Data

By Master

Start

Address & Data

S

Slave Address 0 A 0 0 0 Address A

Data Byte

Stop

AP

By FM31xxx

Acknowledge

Figure 16. Byte Register Write

* Although not required, it is recommended that A5-A7 in the Register Address byte are

zeros in order to preserve compatibility with future devices.

Rev 0.2

May 2003

Page 17 of 22

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