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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

CYUSB3031-BZXC(2013) 데이터 시트보기 (PDF) - Cypress Semiconductor

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CYUSB3031-BZXC
(Rev.:2013)
Cypress
Cypress Semiconductor 
CYUSB3031-BZXC Datasheet PDF : 50 Pages
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CYUSB3035
Table 7. DC Specifications (continued)
Parameter
VOH
Description
Output HIGH voltage
Min
0.9 × VCC
VOL
Output LOW voltage
IIX
Input leakage current for all pins except
–1
SSTXP/SSXM/SSRXP/SSRXM
IOZ
Output High-Z leakage current for all
–1
pins except SSTXP/ SSXM/
SSRXP/SSRXM
ICC Core
Core and analog voltage operating
current
ICC USB
USB voltage supply operating current
ISB1
Total suspend current during suspend
mode with USB 3.0 PHY enabled (L1)
ISB2
Total suspend current during suspend
mode with USB 3.0 PHY disabled (L2)
ISB3
Total standby current during standby
mode (L3)
ISB4
Total standby current during core
power-down mode (L4)
VRAMP
Voltage ramp rate on core and I/O
0.2
supplies
VN
Noise level permitted on VDD and I/O
supplies
VN_AVDD
Noise level permitted on AVDD supply
Max
0.1 × VCC
1
1
Units
V
V
µA
µA
Notes
IOH (max) = –100 µA tested at
quarter drive strength. VCC is
the corresponding I/O voltage
supply.
IOL (min) = +100 µA tested at
quarter drive strength. VCC is
the corresponding I/O voltage
supply.
All I/O signals held at VDDQ
(For I/Os with a pull-up or
pull-down resistor connected,
the leakage current increases
by VDDQ/Rpu or VDDQ/RPD
All I/O signals held at VDDQ
200
mA Total current through AVDD,
VDD
60
mA
mA Core current: 1.5 mA
I/O current: 20 µA
USB current: 2 mA
For typical PVT (typical silicon,
all power supplies at their
respective nominal levels at
25 °C.)
mA Core current: 250 µA
I/O current: 20 µA
USB current: 1.2 mA
For typical PVT (Typical
silicon, all power supplies at
their respective nominal levels
at 25 °C.)
µA Core current: 60 µA
I/O current: 20 µA
USB current: 40 µA
For typical PVT (typical silicon,
all power supplies at their
respective nominal levels at
25 °C.)
µA Core current: 0 µA
I/O current: 20 µA
USB current: 40 µA
For typical PVT (typical silicon,
all power supplies at their
respective nominal levels at
25 °C.)
50
V/ms Voltage ramp must be
monotonic
100
mV Max p-p noise level permitted
on all supplies except AVDD
20
mV Max p-p noise level permitted
on AVDD
Document Number: 001-84160 Rev. *B
Page 21 of 50

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