ATSAM3N0AA-AU 데이터 시트보기 (PDF) - Atmel Corporation

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ATSAM3N0AA-AU

ARM-based Flash MCU

Atmel Corporation 

5.5.2

5.5.3

• Supply Monitor alarm

• RTC alarm

• RTT alarm

Wait Mode

The purpose of the wait mode is to achieve very low power consumption while maintaining the

whole device in a powered state for a startup time of less than 10 µs. Current Consumption in

Wait mode is typically 15 µA (total current consumption) if the internal voltage regulator is used

or 8 µA if an external regulator is used.

In this mode, the clocks of the core, peripherals and memories are stopped. However, the core,

peripherals and memories power supplies are still powered. From this mode, a fast start up is

available.

This mode is entered via Wait for Event (WFE) instructions with LPM = 1 (Low Power Mode bit in

PMC_FSMR). The Cortex-M3 is able to handle external or internal events in order to wake up

the core (WFE). By configuring the WUP0-15 external lines as fast startup wake-up pins (refer to

Section 5.7 “Fast Start-Up”). RTC or RTT Alarm wake-up events can be used to wake up the

CPU (exit from WFE).

Entering Wait Mode:

• Select the 4/8/12 MHz fast RC oscillator as Main Clock

• Set the LPM bit in the PMC Fast Startup Mode Register (PMC_FSMR)

• Execute the Wait-For-Event (WFE) instruction of the processor

Note:

Internal Main clock resynchronization cycles are necessary between the writing of MOSCRCEN

bit and the effective entry in Wait mode. Depending on the user application, Waiting for

MOSCRCEN bit to be cleared is recommended to ensure that the core will not execute undesired

instructions.

Sleep Mode

The purpose of sleep mode is to optimize power consumption of the device versus response

time. In this mode, only the core clock is stopped. The peripheral clocks can be enabled. The

current consumption in this mode is application dependent.

This mode is entered via Wait for Interrupt (WFI) or Wait for Event (WFE) instructions with

LPM = 0 in PMC_FSMR.

The processor can be woke up from an interrupt if WFI instruction of the Cortex M3 is used, or

from an event if the WFE instruction is used to enter this mode.

20 SAM3N Summary

11011BS–ATARM–22-Feb-12

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