ADAU1451WBCPZ-RL 데이터 시트보기 (PDF) - Analog Devices

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ADAU1451WBCPZ-RL

SigmaDSP Digital Audio Processor

Analog Devices 

ADAU1452/ADAU1451/ADAU1450

Data Sheet

PDM Inputs

TA = −40°C to +105°C, DVDD = 1.2 V ± 5%, IOVDD = 1.8 V − 10% to 3.3 V + 10%. PDM data is latched on both edges of the clock (see

Figure 11).

Table 16.

Parameter

Timing Requirements

tSETUP

tHOLD

tMIN

tMAX

Unit

10

ns

5

ns

Description

Data setup time

Data hold time

PDM_CLK

PDM_DAT

tSETUP

R

L

tHOLD

R

L

Figure 11. PDM Timing Diagram

Rev. C | Page 16 of 180

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