CY7C1423KV18(2014) 데이터 시트보기 (PDF) - Cypress Semiconductor

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CY7C1423KV18
(Rev.:2014)

36-Mbit DDR II SIO SRAM Two-Word Burst Architecture

Cypress Semiconductor 

CY7C1423KV18/CY7C1424KV18

Application Example

Figure 2 shows four DDR II SIO used in an application.

Figure 2. Application Example (Width Expansion)

ZQ

ZQ

D[x:0]

SRAM#1

CQ/CQ

Q[x:0]

RQ

D[x:0]

SRAM#2

CQ/CQ

Q[x:0]

RQ

A RPS WPS BWS C C K K

A RPS WPS BWS C C K K

DATA IN[2x:0]

DATA OUT [2x:0]

ADDRESS

RPS

WPS

BWS

CLKIN1/CLKIN1

CLKIN2/CLKIN2

SOURCE K

SOURCE K

DELAYED K

DELAYED K

FPGA / ASIC

Document Number: 001-57829 Rev. *F

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