74HC191 데이터 시트보기 (PDF) - NXP Semiconductors.
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74HC191 Datasheet PDF : 19 Pages
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74HC191
Presettable synchronous 4-bit binary up/down counter
VI
Dn input
VM
GND
VOH
tPHL
tPLH
Qn output
VM
VOL
aaa-024386
Measurement points are given in Table 9.
Logic levels VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 12. The input (Dn) to output (Qn) propagation delays
Vl
Dn input
GND
Vl
PL input
VM
GND
tPLH
tPHL
VOH
Qn output
VM
VOL
aaa-024387
Measurement points are given in Table 9.
Logic levels VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 13. The parallel load input (PL) to output (Qn) propagation delays
VI
U/D input
VM
GND
VOH
tPLH
tPHL
TC output
VM
VOL
VOH
tPHL
tPLH
RC output
VM
VOL
aaa-024388
Measurement points are given in Table 9.
Logic levels VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 14. The up/down count input (U/D) to terminal count and ripple clock output (TC, RC) propagation delays
74HC191
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 5 October 2018
© Nexperia B.V. 2018. All rights reserved
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