ATF20V8B-15SC 데이터 시트보기 (PDF) - Atmel Corporation

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ATF20V8B-15SC

High-performance EE PLD

Atmel Corporation 

ATF20V8B(Q)(L)

Compiler Mode Selection

Registered

ABEL, Atmel-ABEL

P20V8R

CUPL

LOG/iC

G20V8MS

GAL20V8_R(1)

OrCAD-PLD

“Registered”

PLDesigner

P20V8

Tango-PLD

G20V8

Note: 1. Only applicable for version 3.4 or lower.

Complex

P20V8C

G20V8MA

GAL20V8_C7(1)

“Complex”

P20V8

G20V8

Simple

P20V8

G20V8

GAL20V8_C8(1)

“Simple”

P20V8

G20V8

Auto Select

P20V8

G20V8A

GAL20V8

GAL20V8

P20V8

G20V8

ATF20V8B Registered Mode

PAL Device Emulation/PAL Replacement. The registered

mode is used if one or more registers are required. Each

macrocell can be configured as either a registered or com-

binatorial output or I/O, or as an input. For a registered out-

put or I/O, the output is enabled by the OE pin, and the

register is clocked by the CLK pin. Eight product terms are

allocated to the sum term. For a combinatorial output or

I/O, the output enable is controlled by a product term, and

seven product terms are allocated to the sum term. When

the macrocell is configured as an input, the output enable is

permanently disabled.

Any register usage will make the compiler select this mode.

The following registered devices can be emulated using

this mode:

20R8 20RP8

20R6 20RP6

20R4 20RP4

Registered Mode Operation

7

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