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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AD8116(RevB) 데이터 시트보기 (PDF) - Analog Devices

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AD8116 Datasheet PDF : 29 Pages
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AD8116
PIN FUNCTION DESCRIPTIONS
Pin Name
INxx
DATA IN
CLK
DATA OUT
UPDATE
Pin Numbers
2, 4, 6, 8, 10, 12, 14, 16, 18,
20, 22, 24, 26, 28, 30, 32
37, 126
36, 125
35, 124
38, 123
RESET
CE
OUTyy
AGND
DVCC
DGND
DVEE
AVEE
AVCC
AGNDxx
AVCC00
AVCC15
AVCCxx/yy
AVEExx/yy
39, 122
40, 121
65, 67, 69, 71, 73, 75, 77, 79,
81, 83, 85, 87, 89, 91, 93, 95
1, 3, 5, 7, 9, 11, 13, 15, 17, 19,
21, 23, 25, 27, 29, 31, 33, 128
34, 127
41, 120
42, 119
43, 44, 45, 116, 117, 118
46, 47, 48, 113, 114, 115
56–63, 97–104
96
64
68, 72, 76, 80, 84, 88, 92
66, 70, 74, 78, 82, 86, 90, 94
Pin Description
Analog Inputs; xx = Channel No. 00 thru 15.
Serial Data Input, TTL Compatible.
Serial Clock, TTL Compatible. Falling edge triggered.
Serial Data Out, TTL Compatible.
Enable (Transparent) “Low.” Allows serial register to connect directly to switch
matrix. Data latched when “high.”
Disable Outputs, Enable “Low.”
Chip Enable, Enable “Low.” Must be “low” to clock in & latch data.
Analog Outputs yy = Channel Nos. 00 thru 15.
Analog Ground for inputs and switch matrix.
+5 V for Digital Circuitry.
Ground for Digital Circuitry.
–5 V for Digital Circuitry.
–5 V for Inputs and Switch Matrix.
+5 V for Inputs and Switch Matrix.
Ground for Output Amp, xx = Output Channel Nos. 00 thru 15. Must be connected.
+5 V for Output Channel 00. Must be connected.
+5 V for Output Channel 15. Must be connected.
+5 V for Output Amplifier that is shared by Channel Nos. xx and yy. Must be connected.
–5 V for Output Amplifier that is shared by Channel Nos. xx and yy. Must be connected.
VCC
ESD
INPUT
ESD
VEE
a. Analog Input
VCC
ESD
INPUT
ESD
VEE
d. Logic Input
VCC
ESD
ESD
OUTPUT
VEE
b. Analog Output
VCC
ESD
RESET
ESD
20k
c. Reset Input
VCC
2k
ESD
ESD
OUTPUT
VEE
e. Logic Output
Figure 5. I/O Pin Schematics
–6–
REV. B

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