L7400 데이터 시트보기 (PDF) - Intel

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L7400

Intel® Core™2 Duo Mobile Processor for Intel® Centrino® Duo Mobile Processor Technology

Intel 

Electrical Specifications

3 Electrical Specifications

3.1

3.2

3.3

Power and Ground Pins

For clean, on-chip power distribution, the processor will have a large number of VCC

(power) and VSS (ground) inputs. All power pins must be connected to VCC power planes

while all VSS pins must be connected to system ground planes. Use of multiple power

and ground planes is recommended to reduce I*R drop. Please contact your Intel

representative for more details. The processor VCC pins must be supplied the voltage

determined by the VID (Voltage ID) pins.

FSB Clock (BCLK[1:0]) and Processor Clocking

BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the

processor. As in previous generation processors, the core frequency is a multiple of the

BCLK[1:0] frequency. The processor uses a differential clocking implementation.

Voltage Identification

The processor uses seven voltage identification pins, VID[6:0], to support automatic

selection of power supply voltages. The VID pins for processor are CMOS outputs

driven by the processor VID circuitry. Table 2 specifies the voltage level corresponding

to the state of VID[6:0]. A 1 in this refers to a high-voltage level and a 0 refers to low-

voltage level.

Datasheet

21

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