HEF4043B(2016) 데이터 시트보기 (PDF) - NXP Semiconductors.
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HEF4043B Datasheet PDF : 13 Pages
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HEF4043B
Quad R/S latch with 3-state outputs
Rev. 11 — 24 March 2016
Product data sheet
1. General description
The HEF4043B is a quad R/S latch with 3-state outputs with a common output enable
input (OE). Each latch has an active HIGH set input (1S to 4S), an active HIGH reset input
(1R to 4R) and an active HIGH 3-state output (1Q to 4Q).
When OE is HIGH, the latch output (nQ) is determined by the nR and nS inputs as shown
in Table 3. When OE is LOW, the latch outputs are in the high impedance OFF-state. OE
does not affect the state of the latch. The high impedance off-state feature allows common
bussing of the outputs.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C
Complies with JEDEC standard JESD 13-B
3. Applications
Four-bit storage with output enable
4. Ordering information
Table 1. Ordering information
All types operate from 40 C to +85 C.
Type number
Package
Name
Description
HEF4043BT
SO16
plastic small outline package; 16 leads; body width 3.9 mm
Version
SOT109-1
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