Read Cycle 2: WE = VIH
Address
CE
OE
Data Out
tRC
tAA
tAC
tLZ
tOE
tOLZ
High impedance
tHZ
tOHZ
DATA VALID
GS74108TP/J
Write Cycle
Parameter
-8
-10
-12
-15
Symbol
Unit
Min Max Min Max Min Max Min Max
Write cycle time
Address valid to end of write
tWC
8
---
10
---
12
---
15
---
ns
tAW
5.5 ---
7
---
8
--- 10 --- ns
Chip enable to end of write
Data set up time
tCW
5.5 ---
7
---
8
--- 10 --- ns
tDW
4
---
5
---
6
---
7
--- ns
Data hold time
Write pulse width
tDH
0
---
0
---
0
---
0
--- ns
tWP
5.5 ---
7
---
8
--- 10 --- ns
Address set up time
Write recovery time (WE)
tAS
0
---
0
---
0
---
0
--- ns
tWR
0
---
0
---
0
---
0
--- ns
Write recovery time (CE)
tWR1
0
---
0
---
0
---
0
---
ns
Output Low Z from end of write
tWLZ*
3
---
3
---
3
---
3
--- ns
Write to output in High Z
tWHZ*
---
3.5
---
4
---
5
---
6
ns
* These parameters are sampled and are not 100% tested
Rev: 1.06 7/2000
7/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.