PULSE
GENERATOR
VDD
16
INH ZA
AA
BA
CA
DA
EA
AB
BB
CB
DB
EB
DIS ZB
8 VSS CL CL
20 ns
20 ns
INPUT
OUTPUT
90%
50%
10%
tPHL
90%
50%
10%
VDD
VSS
tPLH
VOH
VOL
tTHL
tTLH
Figure 6. Switching Time Test Circuit and Waveforms
(Data Inputs)
B S1
A
PULSE
GENERATOR
VDD
16
INH ZA
AA
BA
CA
DA
EA
AB
BB
CB
DB
EB
DIS ZB
8 VSS
Vout
VDD
20 ns
20 ns
CL
1k
DISABLE
INPUT
90%
50%
10%
S2 A
B
tPLZ
tPZL
90% VOH
10%
≈ 2.5 V @ VDD = 5 V,
OUTPUT
tPHZ
90%
tPZH
10%
10 V AND 15 V
≈ 2 V @ VDD = 5 V
≈ 6 V @ VDD = 10 V
≈ 10
VOL
V
@
VDD
=
15 V
* To test other side of circuit connect to this output and
change switch (S1) to other expand input (E).
SWITCH POSITIONS
TEST
S1
S2
tPLZ
A
A
tPHZ
B
B
tPZL
A
A
tPZH
B
B
Figure 7. Switching Time Test Circuit and Waveforms
(For 3–State Output)
MOTOROLA CMOS LOGIC DATA
MC14506UB
5