ADT7411ARQZ10 데이터 시트보기 (PDF) - Analog Devices

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ADT7411ARQZ10

SPI®/I2C® Compatible, 10-Bit Digital Temperature Sensor and 8-Channel ADC

Analog Devices 

ADT7411

The INT/INT pin has an open-drain configuration that allows

the outputs of several devices to be wired-AND together when

the INT/INT pin is active low. Use C6 of the Control Config-

uration 1 register to set the active polarity of the INT/INT out-

put. The power-up default is active low. The INT/INT output

can be disabled or enabled by setting C5 of Control Configur-

ation 1 register to a 1 or 0, respectively.

The INT/INT output becomes active when either the internal

temperature value, the external temperature value, VDD value, or

any of the AIN input values exceed the values in their corres-

ponding THIGH/VHIGH or TLOW/VLOW registers. The INT/INT

output goes inactive again when a conversion result has the

measured value back within the trip limits and when the status

register associated with the out-of-limit event is read. The two

Interrupt Status registers show which event caused the INT/INT

pin to go active.

CS

1

8

SCLK

The INT/INT output requires an external pull-up resistor. This

can be connected to a voltage different from VDD, provided the

maximum voltage rating of the INT/INT output pin is not

exceeded. The value of the pull-up resistor depends on the

application, but should be as large enough to avoid excessive

sink currents at the INT/INT output, which can heat the chip

and affect the temperature reading.

SMBus Alert Response

The INT/INT pin behaves the same way as an SMBus alert pin

when the SMBus/I2C interface is selected. It is an open-drain

output and requires a pull-up to VDD. Several INT/INT outputs

can be wire-AND together, so that the common line will go low

if one or more of the INT/INT outputs goes low. The polarity of

the INT/INT pin must be set for active low for a number of

outputs to be wire-AND together.

1

8

DIN

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

START

WRITE COMMAND

REGISTER ADDRESS

CS (CONTINUED)

1

8

SCLK (CONTINUED)

DIN (CONTINUED)

D7 D6 D5 D4 D3 D2 D1

DATA BYTE

D0

STOP

Figure 37. SPI—Writing to the Address Pointer Register Followed by a Single Byte of Data to the Selected Register

CS

1

8

1

8

SCLK

DIN

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1

D0

START

STOP

WRITE COMMAND

REGISTER ADDRESS

Figure 38. SPI—Writing to the Address Pointer Register to Select a Register for Subsequent Read Operation

Rev. A | Page 31 of 36

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