ADT7411ARQZ10 데이터 시트보기 (PDF) - Analog Devices

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ADT7411ARQZ10

SPI®/I2C® Compatible, 10-Bit Digital Temperature Sensor and 8-Channel ADC

Analog Devices 

ADT7411

sured AIN6 value has to be less than or equal to the value in this

register. Because it is an 8-bit register, the resolution is four

times less than the resolution of the 10-bit ADC. The default

value is 0 V.

Table 55. AIN6 VLOW Limit

D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

0* 0* 0* 0* 0* 0* 0* 0*

*Default settings at power-up.

AIN7 VHIGH Limit Register (Read/Write) [Address = 35h]

This limit register is an 8-bit read/write register that stores the

AIN7 input upper limit that will cause an interrupt and activate

the INT/INT output (if enabled). For this to happen, the mea-

sured AIN7 value has to be greater than the value in this reg-

ister. Because it is an 8-bit register, the resolution is four times

less than the resolution of the 10-bit ADC. The default value is

full-scale voltage.

Table 56. AIN7 VHIGH Limit

D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

1* 1* 1* 1* 1* 1* 1* 1*

*Default settings at power-up.

AIN7 VLOW Limit Register (Read/Write) [Address = 36h]

This limit register is an 8-bit read/write register that stores the

AIN7 input lower limit that will cause an interrupt and activate

the INT/INT output (if enabled). For this to happen, the mea-

sured AIN7 value has to be less than or equal to the value in this

register. Because it is an 8-bit register, the resolution is four

times less than the resolution of the 10-bit ADC. The default

value is 0 V.

Table 57. AIN7 VLOW Limit

D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

0* 0* 0* 0* 0* 0* 0* 0*

*Default settings at power-up.

AIN8 VHIGH Limit Register (Read/Write) [Address = 37h]

This limit register is an 8-bit read/write register that stores the

AIN8 input upper limit that will cause an interrupt and activate

the INT/INT output (if enabled). For this to happen, the mea-

sured AIN8 value has to be greater than the value in this reg-

ister. As it is an 8-bit register, the resolution is four times less

than the resolution of the 10-bit ADC. The default value is full-

scale voltage.

Table 58. AIN8 VHIGH Limit

D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

1* 1* 1* 1* 1* 1* 1* 1*

*Default settings at power-up.

AIN8 VLOW Limit Register (Read/Write) [Address = 38h]

This limit register is an 8-bit read/write register that stores the

AIN8 input lower limit that will cause an interrupt and activate

the INT/INT output (if enabled). For this to happen, the mea-

sured AIN8 value has to be less than or equal to the value in this

register. Because it is an 8-bit register, the resolution is four

times less than the resolution of the 10-bit ADC. The default

value is 0 V.

Table 59. AIN8 VLOW Limit

D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

0* 0* 0* 0* 0* 0* 0* 0*

*Default settings at power-up.

Device ID Register (Read-Only) [Address = 4Dh]

This 8-bit read-only register gives a unique identification

number for this part. ADT7411 = 02h.

Manufacturer’s ID Register (Read-Only) [Address = 4Eh]

This register contains the manufacturer’s identification number.

ADI’s is 41h.

Silicon Revision Register (Read-Only) [Address = 4Fh]

This register is divided into the four LSBs representing the

stepping and the four MSBs representing the version. The step-

ping contains the manufacturer’s code for minor revisions or

steppings to the silicon. The version is the ADT7411 version

number, 0100b (4h).

SPI Lock Status Register (Read-Only) [Address = 7Fh]

Bit D0 (LSB) of this read-only register indicates whether the SPI

interface is locked or not. Writing to this register will cause the

device to malfunction. Default value is 00h.

0 = I2C interface.

1 = SPI interface selected and locked.

SERIAL INTERFACE

There are two serial interfaces that can be used on this part:

I2C and SPI. The device will power up with the serial interface

in I2C mode but it is not locked into this mode. To stay in I2C

mode, it is recommended that the user tie the CS line to either

VCC or GND. It is not possible to lock the I2C mode, but it is

possible to select and lock the SPI mode.

To select and lock the interface into the SPI mode, a number of

pulses must be sent down the CS (Pin 4) line. The following

section describes how this is done.

Once the SPI communication protocol has been locked in, it

cannot be unlocked while the device is still powered up. Bit D0

of the SPI Lock Status register (Address 7Fh) is set to 1 when a

successful SPI interface lock has been accomplished. To reset

the serial interface, the user must power down the part and

power up again. A software reset does not reset the serial

interface.

Rev. A | Page 27 of 36

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