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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

ADT7411ARQZ10 데이터 시트보기 (PDF) - Analog Devices

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ADT7411ARQZ10 Datasheet PDF : 36 Pages
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ADT7411
AIN3 VHIGH Limit Register (Read/Write) [Address = 2Dh]
This limit register is an 8-bit read/write register that stores the
AIN3 input upper limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN3 value has to be greater than the value in this reg-
ister. Because it is an 8-bit register, the resolution is four times
less than the resolution of the 10-bit ADC. The default value is
full-scale voltage.
Table 48. AIN3 VHIGH Limit
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
1* 1* 1* 1* 1* 1* 1* 1*
*Default settings at power-up.
AIN3 VLOW Limit Register (Read/Write) [Address = 2Eh]
This limit register is an 8-bit read/write register that stores the
AIN3 input lower limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN3 value has to be less than or equal to the value in this
register. Because it is an 8-bit register, the resolution is four
times less than the resolution of the 10-bit ADC. The default
value is 0 V.
Table 49. AIN3 VLOW Limit
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
0* 0* 0* 0* 0* 0* 0* 0*
*Default settings at power-up.
AIN4 VHIGH Limit Register (Read/Write) [Address = 2Fh]
This limit register is an 8-bit read/write register that stores the
AIN4 input upper limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN4 value has to be greater than the value in this reg-
ister. Because it is an 8-bit register, the resolution is four times
less than the resolution of the 10-bit ADC. The default value is
full-scale voltage.
Table 50. AIN4 VHIGH Limit
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
1* 1* 1* 1* 1* 1* 1* 1*
*Default settings at power-up.
AIN4 VLOW Limit Register (Read/Write) [Address = 30h]
This limit register is an 8-bit read/write register that stores the
AIN4 input lower limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN4 value has to be less than or equal to the value in this
register. Because it is an 8-bit register, the resolution is four
times less than the resolution of the 10-bit ADC. The default
value is 0 V.
Table 51. AIN4 VLOW Limit
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
0* 0* 0* 0* 0* 0* 0* 0*
*Default settings at power-up.
AIN5 VHIGH Limit Register (Read/Write) [Address = 31h]
This limit register is an 8-bit read/write register that stores the
AIN5 input upper limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN5 value has to be greater than the value in this reg-
ister. Because it is an 8-bit register, the resolution is four times
less than the resolution of the 10-bit ADC. The default value is
full-scale voltage.
Table 52. AIN5 VHIGH Limit
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
1* 1* 1* 1* 1* 1* 1* 1*
*Default settings at power-up.
AIN5 VLOW Limit Register (Read/Write) [Address = 32h]
This limit register is an 8-bit read/write register that stores the
AIN5 input lower limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the meas-
ured AIN5 value has to be less than or equal to the value in this
register. Because it is an 8-bit register, the resolution is four
times less than the resolution of the 10-bit ADC. The default
value is 0 V.
Table 53. AIN5 VLOW Limit
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
0* 0* 0* 0* 0* 0* 0* 0*
*Default settings at power-up.
AIN6 VHIGH Limit Register (Read/Write) [Address = 33h]
This limit register is an 8-bit read/write register that stores the
AIN3 input upper limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN6 value has to be greater than the value in this reg-
ister. Because it is an 8-bit register, the resolution is four times
less than the resolution of the 10-bit ADC. The default value is
full-scale voltage.
Table 54. AIN6 VHIGH Limit
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
1* 1* 1* 1* 1* 1* 1* 1*
*Default settings at power-up at power-up.
AIN6 VLOW Limit Register (Read/Write) [Address = 34h]
This limit register is an 8-bit read/write register that stores the
AIN6 input lower limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
Rev. A | Page 26 of 36

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