74LVT16374AEV/G,51 데이터 시트보기 (PDF) - NXP Semiconductors.
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74LVT16374AEV/G,51 Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVT16374A; 74LVTH16374A
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10.
Symbol Parameter
Conditions
tsu
set-up time
th
hold time
tW
pulse width
nDn to nCP; HIGH or LOW; see Figure 9
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
nDn to nCP; HIGH or LOW; see Figure 9
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
nCP HIGH; see Figure 7
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
nCP LOW; see Figure 7
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
[1] All typical values are at VCC = 3.3 V and Tamb = 25 °C.
[2] tsu is the same as tsu(H) and tsu(L).
[3] th is the same as th(H) and th(L).
[4] tW is the same as tW(H) and tW(L).
11. Waveforms
Min
[2]
2.0
2.0
[3]
0.8
0.1
[4]
1.5
1.5
3.0
3.0
Typ[1] Max
Unit
0.7
-
ns
-
-
ns
0
-
ns
-
-
ns
0.6
-
ns
-
-
ns
1.6
-
ns
-
-
ns
VI
nCP input
GND
VOH
nQn output
VOL
1/ fmax
VM
tW
t PHL
VM
VM
t PLH
001aaa256
Fig 7.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Propagation delay clock input to output, clock pulse width and maximum clock frequency
Table 8.
Input
VM
1.5 V
Measurement points
Output
VM
1.5 V
VX
VOL + 0.3 V
VY
VOH − 0.3 V
74LVT_LVTH16374A_7
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 07 — 22 March 2010
© NXP B.V. 2010. All rights reserved.
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