LT1169 데이터 시트보기 (PDF) - Linear Technology

부품명

상세내역

제조사

LT1169

Dual Low Noise, Picoampere Bias Current, JFET Input Op Amp

Linear Technology 

LT1169

APPLICATI S I FOR ATIO

15V

IN– 3 +

8

R4

R6

1/2

1

1k

10k

LT1169

2 – IC1

4

R1

1k

C1

30pF

–15V

6–

1/2

LT1169

IN+ 5 + IC1

R2

200Ω

7

R3

1k

R5

1k

2–

1/2

1

LT1169

3 + IC2

R7

10k

GAIN = 100

BANDWIDTH = 330kHz

INPUT REFERRED NOISE = 8.7nV/√Hz AT 1kHz

WIDEBAND NOISE DC TO 330kHz = 5.3µVRMS

CL ≤ 0.01µF

LT1169 • F05

OUTPUT

CL

Figure 5. Three Op Amp Instrumentation Amplifier

Assume CMRRA = 50µV/V or 86dB,

and CMRRB = 39µV/V or 88dB,

then ∆CMRR = 11µV/V or 99dB;

if CMRRB = – 39µV/V which is still 88dB,

then ∆CMRR = 89µV/V or 81dB

By specifying and guaranteeing all of these matching

parameters, the LT1169 can significantly improve the

performance of matching-dependent circuits.

Typical performance of the instrumentation amplifier:

Input offset voltage = 0.8mV

Input bias current = 4pA

Input offset current = 3pA

Input resistance = 1013Ω

Input noise = 3.4µVP-P

High Speed Operation

The low noise performance of the LT1169 was achieved by

enlarging the input JFET differential pair to maximize the

first stage gain. Enlarging the JFET geometry also increases

the parasitic gate capacitance, which if left unchecked, can

result in increased overshoot and ringing. When the feed-

back around the op amp is resistive (RF), a pole will be

created with RF, the source resistance and capacitance

(RS,CS), and the amplifier input capacitance (CIN = 1.5pF).

In closed-loop gain configurations with RS and RF in the

MΩ range (Figure 6), this pole can create excess phase shift

and even oscillation. A small capacitor (CF) in parallel with

RF eliminates this problem. With RS(CS + CIN) = RFCF, the

effect of the feedback pole is completely removed.

CF

RS

CS

RF

–

+ CIN

Figure 6

OUTPUT

LT1169 • F06

TYPICAL APPLICATIONS N

Unity-Gain Buffer with Extended Load Capacitance

Drive Capability

R2

1k

C1

–

1/2 LT1169

+

VIN

R1

33Ω

VOUT

CL

LT1169 • TA03

C1 = CL ≤ 0.1µF

OUTPUT SHORT CIRCUIT CURRENT (∼ 30mA) WILL LIMIT THE RATE

AT WHICH THE VOLTAGE CAN CHANGE ACROSS LARGE CAPACITORS

(I = CddVt )

10

Light Balance Detection Circuit

I1

PD1

I2

PD2

R1

1M

C1

3pF TO 5pF

–

1/2 LT1169

+

VOUT

LT1169 • TA04

VOUT = 1M × (I1 – I2)

PD1,PD2 = HAMAMATSU S1336-5BK

WHEN EQUAL LIGHT ENTERS PHOTODIODES, VOUT < 3mV.

Share Link: