74HCT161N,652 데이터 시트보기 (PDF) - NXP Semiconductors.
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74HCT161N,652 Datasheet PDF : 18 Pages
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Nexperia
74HC161
Presettable synchronous 4-bit binary counter; asynchronous reset
MR
PE
D0
D1
D2
D3
CP
CEP
CET
Q0
Q1
Q2
Q3
TC
12
13 14
15
0
1
2
Fig. 8.
reset
preset
count
inhibit
mna909
Typical timing sequence: reset outputs to zero; preset to binary twelve; count to thirteen, fourteen, fifteen, zero,
one and two; inhibit.
Typical timing sequence
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < -0.5 V or VI > VCC + 0.5 V
VO < -0.5 V or VO > VCC + 0.5 V
VO = -0.5 V to VCC + 0.5 V
-0.5
-
-
-
-
-50
-65
[1]
-
+7.0 V
±20 mA
±20 mA
±25 mA
50 mA
- mA
+150 °C
500 mW
[1] For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K.
For (T)SSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.
74HC161
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 4 October 2018
© Nexperia B.V. 2018. All rights reserved
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