XRT83SL30(2003) 데이터 시트보기 (PDF) - Exar Corporation

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XRT83SL30
(Rev.:2003)

SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

Exar Corporation 

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XRT83SL30

SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

PRELIMINARY

REV. P1.0.4

PIN DESCRIPTIONS BY FUNCTION

SERIAL INTERFACE

SIGNAL NAME

HW/HOST

SDI

EQC4

SDO

EQC3

SCLK

EQC2

CS

EQC1

INT

EQC0

PIN #

20

21

22

23

24

25

TYPE

I

I

DESCRIPTION

Mode Control Input

This pin is used for selecting Hardware or Host Mode to control the device.

Leave this pin unconnected or tie “High” to select Hardware Mode.

For Host Mode, this pin must be tied “Low”.

NOTE: Internally pulled “High” with a 50kΩ resistor.

Serial Data Input

In Host Mode, this pin is the data input for the Serial Interface.

Equalizer Control Input 4

Hardware Mode, See “Control function” on page 13.

O Serial Data Output

In Host Mode, this pin is the output “Read” data for the serial interface.

I

Equalizer Control Input 3

Hardware Mode, See “Control function” on page 13.

I

Serial Interface Clock Input

In Host Mode, this clock signal is used to control data “Read” or “Write”

operation for the Serial Interface. Maximum clock frequency is 20MHz.

Equalizer Control Input 2

Hardware Mode, See “Control function” on page 13.

I

Chip Select Input

In Host Mode, tie this pin “Low” to enable communication with the device via

the Serial Interface.

Equalizer Control Input 1

Hardware Mode, See “Control function” on page 13.

O Interrupt Output (active "Low")

In Host Mode, this pin goes “Low” to indicate an alarm condition has

occurred within the device. Interrupt generation can be globally disabled by

setting the GIE bit to “0” in the command control register.

I

Equalizer Control Input 0

Hardware Mode, See “Control function” on page 13.

NOTE: This pin is an open drain output and requires an external 10kΩ pull-up

resistor.

4

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