MOSEL VITELIC
Functional Block Diagram
X-Decoder
V29C31004T/V29C31004B
4,194,304 Bit
Memory Cell Array
A0–A18
Address buffer & latches
Y-Decoder
CE
OE
Control Logic
WE
I/O Buffer & Data Latches
I/O0–I/O7
51004-07
Capacitance (1,2)
Symbol Parameter
CIN
Input Capacitance
COUT
Output Capacitance
CIN2
Control Pin Capacitance
NOTE:
1. Capacitance is sampled and not 100% tested.
2. TA = 25°C, VCC = 5V ± 10%, f = 1 MHz.
Latch Up Characteristics(1)
Test Setup
VIN = 0
VOUT = 0
VIN = 0
Typ.
6
8
8
Max.
8
12
10
Units
pF
pF
pF
Parameter
Min.
Max.
Input Voltage with Respect to GND on A9, OE
Input Voltage with Respect to GND on I/O, address or control pins
VCC Current
NOTE:
1. Includes all pins except VCC. Test conditions: VCC = 3.3V, one pin at a time.
-1
-1
-100
+13
VCC + 1
+100
AC Test Load
Device Under
Test
CL = 100 pF
+3.3 V
IN3064
or Equivalent
2.7 kΩ
6.2 kΩ
IN3064 or Equivalent
IN3064 or Equivalent
IN3064 or Equivalent
Unit
V
V
mA
31004-08
V29C31004T/V29C31004B Rev. 0.3 October 2000
3