UPD178023 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD178023

8-BIT SINGLE-CHIP MICROCONTROLLER

NEC => Renesas Technology 

µPD178023, 178024

FUNCTIONAL OUTLINE

Item

Internal

memory

ROM

High-speed RAM

General-purpose register

Minimum instruction execution time

Instruction set

I/O port

A/D converter

Serial interface

Timer

Buzzer output

Vectored

interrupt

source

Maskable

Non-maskable

Software

PLL

frequency

synthesizer

Division mode

Reference frequency

Charge pump

Phase comparator

(1/2)

µPD178023

µPD178024

24 Kbytes

(Mask ROM)

32 Kbytes

(Mask ROM)

1024 bytes

8 bits × 32 registers (8 bits × 8 registers × 4 banks)

0.45 µs/0.89 µs/1.78 µs/3.56 µs/7.11 µs (with crystal resonator of fX = 4.5 MHz)

• 16-bit operation

• Multiplication/division (8 bits × 8 bits, 16 bits ÷ 8 bits)

• Bit manipulation (set, reset, test, Boolean operation)

• BCD adjustment, etc.

Total

: 62 pins

• CMOS I/O

: 53 pins

• CMOS input

: 6 pins

• N-ch open-drain output : 3 pins

8-bit resolution × 6 channels (VDD = 4.5 to 5.5 V)

• I2C bus modeNote : 1 channel

• 3-wire mode : 1 channel

• UART mode : 1 channel

• Basic timer (timer carry FF (10 Hz)) : 1 channel

• 8-bit timer/event counter

: 2 channels

• Watchdog timer

: 1 channel

1 channel (1 kHz, 1.5 kHz, 3 kHz, 4 kHz)

Internal : 11

External: 5

Internal: 1

Internal: 1

2 types

• Direct division mode (VCOL pin)

• Pulse swallow mode (VCOL and VCOH pins)

Seven types selectable in software (1, 3, 9, 10, 12.5, 25, 50 kHz)

Error out output: 2 pins

Unlock detectable in software

Note When the I2C bus mode is used (including when the mode is implemented in software without using the

peripheral hardware), consult NEC when ordering a mask.

4

Data Sheet U14126EJ1V0DS00

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