UPD161644 데이터 시트보기 (PDF) - NEC => Renesas Technology
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UPD161644 Datasheet PDF : 51 Pages
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µPD161644
1. BLOCK DIAGRAM/SYSTEM DIAGRAM
C1+
C1
C1-
C2+
C1
C2-
C3+
C2
C3-
C4+
C2
C4-
C5+
C2
C5 -
C6+
C2
C6-
DCCLK
GCS
GCL
GDA
DCON
RGONR
VCD2
VMS
FS0
FS2
CLS0
RGON
VSEL
EXRV
ACS0
SCN0
SCN1
SCN2
PUPT0
DUPF0
R,/L
CLK
FRM
STVR
OE1
OE2
OSC
Serial interface
register
Switch
SR1 SR2
DC/DC converter
VDC
DC/DC converter
DC/DC converter
VDC
Regurator
VR
VREF
Regurator
VS
D/A
Common
driver
circuit
D/A
Gate output
low level select circuit
SR119 SR120 SR121 SR122
MPX
SR240 SR241
V DC
VCC1
VSS1
PV CC1
PVSS1
PVSS3
Level Shifter
VDD2
C2
VDD1
C2
VSS2
C2
VSS3
C2
VSS4
C2
VGD
VR
C2
VS
MVS
Source driver
C3 5 V
4V
VCIN
VCOM
COMH
C2
COML
C2
VCOMIN
Source driver
Common
VM
IFSEL
/GRESET
STVL
VMON
TESTIN1
TESTIN2
TESTOUT1
TESTOUT2
VB
O1 O2
O119 O120
O122 O122
O240 O241
Remarks 1./xxx indicates active low signal.
2.Level Shifter (LS): Interfaces between 2.7 V CMOS level and VDD1 to VB level.
2
Preliminary Product Information S15797EJ1V4PM
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