ADG752BRTZ-REEL7 데이터 시트보기 (PDF) - Analog Devices

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ADG752BRTZ-REEL7

CMOS, Low Voltage RF/Video, SPDT Switch

Analog Devices 

SPECIFICATIONS (VDD = +3 V ؎ 10%, GND = 0 V, unless otherwise noted.)

Parameter

B Version

–40؇C

+25؇C

to +85؇C

Units

ANALOG SWITCH

Analog Signal Range

On-Resistance (RON)

On-Resistance Match Between

Channels (∆RON)

LEAKAGE CURRENTS

Source OFF Leakage IS (OFF)

Channel ON Leakage ID, IS (ON)

35

0.2

2.5

± 0.01

± 0.25

± 0.01

± 0.25

0 V to VDD

50

2.5

± 3.0

± 3.0

V

Ω typ

Ω max

Ω typ

Ω max

nA typ

nA max

nA typ

nA max

DIGITAL INPUTS

Input High Voltage, VINH

Input Low Voltage, VINL

Input Current

IINL or IINH

CIN, Digital Input Capacitance

DYNAMIC CHARACTERISTICS1

tON

tOFF

Break-Before-Make Time Delay

Off Isolation

2.0

0.4

0.001

± 0.5

2

10

18

4

8

6

1

–80

V min

V max

µA typ

µA max

pF typ

ns typ

ns max

ns typ

ns max

ns typ

ns min

dB typ

Crosstalk

–80

dB typ

–3 dB Bandwidth

CS (OFF)

CD, CS (ON)

POWER REQUIREMENTS

IDD

250

4

15

0.001

0.1

0.5

NOTES

1Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

MHz typ

pF typ

pF typ

µA typ

µA max

ADG752

Test Conditions/Comments

VS = 0 V to VDD, IDS = 10 mA;

Test Circuit 1

VS = 0 V to VDD, IDS = 10 mA

VDD = +3.3 V

VS = 3 V/1 V, VD = 1 V/3 V;

Test Circuit 2

VS = VD = 1 V or 3 V;

Test Circuit 3

VIN = VINL or VINH

RL = 300 Ω, CL = 35 pF;

VS = 2 V, Test Circuit 4

RL = 300 Ω, CL = 35 pF;

VS = 2 V, Test Circuit 4

RL = 300 Ω, CL = 35 pF;

VS = 2 V, Test Circuit 5

RL = 50 Ω, CL = 5 pF, f = 30 MHz;

Test Circuit 6

RL = 50 Ω, CL = 5 pF, f = 30 MHz;

Test Circuit 7

RL = 50 Ω, CL = 5 pF, Test Circuit 8

VDD = +3.3 V

Digital Inputs = 0 V or +3.3 V

REV. A

–3–

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