ADG706/ADG707
VDD
VSS
VDD
VSS
A3
S1
VS
A2
S2 THRU S16
3V
ENABLE
DRIVE (VIN)
0V
A1 ADG706*
VO
A0
D
EN
VOUT
OUTPUT
VIN
50⍀
GND
RL
CL
300⍀ 35pF
0V
50%
50%
0.9VO
t OFF (EN)
0.9VO
t ON(EN)
*SIMILAR CONNECTION FOR ADG707
Test Circuit 7. Enable Delay, tON (EN), tOFF (EN)
RS
VS
VIN
VDD
VSS
VDD
VSS
A3
A2
ADG706*
A1
A0
S
D
EN
GND
VOUT
CL
1nF
3V
LOGIC
INPUT (VIN)
0V
VOUT
QINJ = CL ؋ ⌬VOUT
⌬VOUT
*SIMILAR CONNECTION FOR ADG707
Test Circuit 8. Charge Injection
VDD
VDD
A3
S1
A2
S16
VS
A1 ADG706*
A0
EN**
GND
D
VSS
RL
50⍀
VOUT
VSS
*SIMILAR CONNECTION FOR ADG707
**CONNECT TO 2.4V FOR BANDWIDTH MEASUREMENTS
OFF ISOLATION = 20LOG10(VOUT/VS)
OFF ISOLATION = 20LOG10 VOUT WITH SWITCH
(
)
VOUT WITHOUT SWITCH
Test Circuit 9. OFF Isolation and Bandwidth
VDD
50⍀
VDD
A3
A2
EN
A1
ADG706*
A0
S1
D
S2
2.4V
RL
50⍀
VOUT
VS
S16
GND
VSS
VSS
*SIMILAR CONNECTION FOR ADG707
CHANNEL-TO-CHANNEL CROSSTALK = 20LOG10(VOUT/VS)
Test Circuit 10. Channel-to-Channel Crosstalk
–10–
REV. 0