
CMOS 16K (2K × 8) Static RAM
VCC
4.5 V
2.2 V
VCCDR
CE
0V
tCDR
DATA RETENTION MODE
tR
CE ≥ VCCDR -0.2 V
Figure 3. Low Voltage Data Retention
A0 - A10
CE
OE
DOUT
NOTE: WE = "HIGH"
tRC
tAA
tACE
tOE
tCLZ
tOLZ
tOH
tCHZ
tOHZ
DATA VALID
Figure 4. Read Cycle
LH5116/H
5116-6
5116-3
5