CXD1254AR 데이터 시트보기 (PDF) - Sony Semiconductor

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CXD1254AR

CCD Camera Synchronization and Timing Signal Generator

Sony Semiconductor 

Block Diagram (Pin No.s given for CXD1254AR)

CXD1254AR/AQ

TEST2 54

TEST3 58

EXT 52

TEST1 48

FLD 49

1/525 or 1/625

COUNTER

1/65 COUNTER

V-DECODER

1/7 or 1/6

COUNTER

H-DECODER

V-CONTROL

OUTPUT CONTROL

HD 1

VD 2

H-INIT

V-RELATIVE

COUNTER

H-RELATIVE COUNTER

H-RELATIVE COUNTER

C KIN 11

OSCI 9

OSCO 10

CL 3

V-INIT

1/3

1/2

V-ROM

(VD1)

LATCH

RESET

LATCH

ADDRESS

COUNTER

LATCH

H-ROM H-ROM

(HD1)

(HD2)

LATCH

H-ROM

(HD3)

H-ROM

(RD1)

LATCH

ADDRESS

COUNTER

H-ROM

(RD2)

LATCH

CK

GENERATION

SELECT

PS 16

ED0 13

ED1 14

ED2 15

ENB 12

PHASE CONT.

GATE

GATE

GATE

GATE

37 38 18 19 20 21 34 33 35 36 23 25 45 39 46 41 42 43 44 27 26 29 31 28 30

4 D1

5 D2

6 D3

62 BF

63 CBLK

64 SYNC

—2—

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