STK14C88-3NF35ITR 데이터 시트보기 (PDF) - Simtek Corporation
부품명
상세내역
제조사
STK14C88-3NF35ITR Datasheet PDF : 18 Pages
| |||
PREVENTING STORES
The STORE function can be disabled on the fly by
holding HSB high with a driver capable of sourcing
30mA at a VOH of at least 2.2V, as it will have to
overpower the internal pull-down device that drives
HSB low for 20μs at the onset of a STORE. When
the STK14C88-3 is connected for AutoStore opera-
tion (system VCC connected to VCC and a 68μF
capacitor on VCAP) and VCC crosses VSWITCH on the
way down, the STK14C88-3 will attempt to pull HSB
low; if HSB doesn’t actually get below VIL, the part
will stop trying to pull HSB low and abort the STORE
attempt.
HARDWARE PROTECT
The STK14C88-3 offers hardware protection against
inadvertent STORE operation and SRAM WRITEs dur-
ing low-voltage conditions. When VCAP < VSWITCH, all
externally initiated STORE operations and SRAM
WRITEs will be inhibited.
LOW AVERAGE ACTIVE POWER
The STK14C88-3 draws significantly less current
when it is cycled at times longer than 50ns. Figure 4
shows the relationship between ICC and READ cycle
time. Worst-case current consumption is shown for
both CMOS and TTL input levels (commercial tem-
perature range, VCC = 3.6V, 100% duty cycle on chip
enable). Figure 5 shows the same relationship for
WRITE cycles.
STK14C88-3
If the chip enable duty cycle is less than 100%, only
standby current is drawn when the chip is disabled.
The overall average current drawn by the
STK14C88-3 depends on the following items: 1)
CMOS vs. TTL input levels; 2) the duty cycle of chip
enable; 3) the overall cycle rate for accesses; 4) the
ratio of READs to WRITEs; 5) the operating tempera-
ture; 6) the Vcc level; and 7) I/O loading.
100
80
60
40
TTL
20
CMOS
0
50
100 150 200
Cycle Time (ns)
Figure 4: Icc (max) Reads
100
80
60
TTL
40
CMOS
20
0
50
100 150 200
Cycle Time (ns)
Figure 5: Icc (max) Writes
Document Control #ML0015 Rev 2.0
13
Feb, 2008
Share Link: 