STA323WTR 데이터 시트보기 (PDF) - STMicroelectronics
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STA323WTR Datasheet PDF : 41 Pages
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STA323W
7.6.5 Zero-Crossing Volume Enable
BIT
R/W
RST
NAME
DESCRIPTION
6
R/W
1
ZCE
Zero-Crossing Volume Enable:
1 – Volume adjustments will only occur at digital zero-crossings
0 – Volume adjustments will occur immediately
The ZCE bit enables zero-crossing volume adjustments. When volume is adjusted on digital zero-cross-
ings no clicks will be audible.
7.6.6 Soft Volume Update Enable
BIT
R/W
RST
NAME
DESCRIPTION
7
R/W
1
SVE
Soft Volume Enable:
1 – Volume adjustments will use soft volume
0 – Volume adjustments will occur immediately
The STA323W includes a soft volume algorithm that will step through the intermediate volume values at
a predetermined rate when a volume change occurs. By setting SVE=0 this can be bypassed and volume
changes will jump from old to new value directly. This feature is only available if individual channel volume
bypass bit is set to ‘0’.
7.7 Configuration Register F (Address 05h)
D7
EAPD
0
D6
PWDN
1
D5
D4
D3
D2
ECLE
RES
BCLE
IDE
0
1
1
1
D1
OCFG1
1
D0
OCFG0
0
7.7.1 Output Configuration Selection
BIT
R/W
RST
NAME
DESCRIPTION
1…0
R/W
00
OCFG Output Configuration Selection
(1…0) 00 – 2-channel (Full-bridge) Power, 1-channel DDX is default
Table 15. Output Configuration Selections
OCFG (1...0)
00
01
10
11
Output Power Configuration
2 Channel (Full-Bridge) Power, 1 Channel DDX:
1A/1B ◊ 1A/1B
2A/2B ◊ 2A/2B
2(Half-Bridge).1(Full-Bridge) On-Board Power:
1A ◊ 1A
Binary
2A ◊ 1B
Binary
3A/3B ◊ 2A/2B Binary
Reserved
1 Channel Mono-Parallel:
3A ◊ 1A/1B
3B ◊ 2A/2B
7.7.2 nvalid Input Detect Mute Enable
BIT
R/W
RST
NAME
DESCRIPTION
2
R/W
1
IDE
Invalid Input Detect Auto-Mute Enable:
0 – Disabled
1 – Enabled
Setting the IDE bit enables this function, which looks at the input I2S data and clocking and will automati-
cally mute all outputs if the signals are perceived as invalid.
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