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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

STA323WTR 데이터 시트보기 (PDF) - STMicroelectronics

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STA323WTR
ST-Microelectronics
STMicroelectronics 
STA323WTR Datasheet PDF : 41 Pages
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STA323W
7.5.3 DSP Bypass
BIT R/W
2
R/W
RST
0
NAME
DSPB
DESCRIPTION
DSP Bypass Bit:
0 – Normal Operation
1 – Bypass of EQ and Mixing Functionality
Setting the DSPB bit bypasses all the EQ and Mixing functionality of the STA323W Core.
7.5.4 Post-Scale Link
BIT R/W RST
3
R/W
0
NAME
PSL
DESCRIPTION
Post-Scale Link:
0 – Each Channel uses individual Post-Scale value
1 – Each Channel uses Channel 1 Post-Scale value
Post-Scale functionality is an attenuation placed after the volume control and directly before the conver-
sion to PWM. Post-Scale can also be used to limit the maximum modulation index and therefore the peak
current. A setting of 1 in the PSL register will result in the use of the value stored in Channel 1 post-scale
for all three internal channels.
7.5.5 Biquad Coefficient Link
BIT R/W RST
NAME
DESCRIPTION
4
R/W
0
BQL
Biquad Link:
0 – Each Channel uses coefficient values
1 – Each Channel uses Channel 1 coefficient values
For ease of use, all channels can use the biquad coefficients loaded into the Channel 1 Coefficient RAM
space by setting the BQL bit to 1. Therefore, any EQ updates only have to be performed once.
7.5.6 Dynamic Range Compression/Anti-Clipping Bit
BIT R/W RST
5 R/W
0
NAME
DRC
DESCRIPTION
Dynamic Range Compression/Anti-Clipping
0 – Limiters act in Anti-Clipping Mode
1 – Limiters act in Dynamic Range Compression Mode
Both limiters can be used in one of two ways, anti-clipping or dynamic range compression. When used in
anti-clipping mode the limiter threshold values are constant and dependent on the limiter settings. In dy-
namic range compression mode the limiter threshold values vary with the volume settings allowing a night-
time listening mode that provides a reduction in the dynamic range regardless of the volume level.
7.5.7 Zero-Detect Mute Enable
BIT
R/W
RST
NAME
DESCRIPTION
6
R/W
1
ZDE
Zero-Detect Mute Enable: Setting of 1 enables the automatic zero-
detect mute
Setting the ZDE bit enables the zero-detect automatic mute. When ZDE=1, the zero-detect circuit looks
at the input data to each processing channel after the channel-mapping block. If any channel receives
2048 consecutive zero value samples (regardless of fs) then that individual channel is muted if this func-
tion is enabled.
7.5.8 1.1.5Miami ModeTM Enable
BIT
R/W
RST
NAME
7
R/W
0
MME
DESCRIPTION
Miami-Mode Enable:
0 – Sub Mix into Left/Right Disabled
1 – Sub Mix into Left/Right Enabled
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