Audio Signaling Processor
21
MX803A PRELIMINARY INFORMATION
Parameter
t
CSE
t
CSH
t
CSOFF
t
NXT
t
CK
t
CH
t
CL
t
CDS
t
CDH
t
RDS
t
RDH
t
HIZ
Chip Select Low to First Serial Clock Rising Edge
Last Serial Clock Rising Edge to Chip Select High
Chip Select High
Command Data Inter-Byte Time
Serial Clock Period
Decoder or Encoder Clock High
Decoder or Encoder Clock Low
Command Data Set-Up Time
Command Data Hold Time
Reply Data Set-Up Time
Reply Data Hold Time
Chip Select High to Reply Data High - Z
Min Typ Max Unit
2.0
µs
4.0
µs
2.0
µs
4.0
µs
2.0
µs
500
ns
500
ns
250
ns
0
ns
250
ns
50.0
ns
2.0 µs
Table 11: Timing Information
Timing Information Notes
1. Command Data is transmitted to the peripheral MSB (bit 7) first, LSB (bit 0) last. Reply Data is read from the MX803A
MSB (bit 7) first, LSB (bit 0) last.
2. Data is clocked into the MX803A and into the µC on the rising Serial Clock edge.
3. Loaded data instructions are acted upon at the end of each individual, loaded byte.
4. To allow for differing µC serial interface formats, the MX803A will work with either polarity Serial Clock pulses.
tCK
tCL
tCH
tCDS
tCDH
SERIAL CLOCK
(from C)
70% VDD
30% VDD
COMMAND DATA
(from C)
REPLY DATA
(to C)
tRDS
tRDH
Figure 9: Timing Relationship for C-BUS Information Transfer
© 1996 MX•COM, INC.
Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc. # 20480122.003