HI-8582 데이터 시트보기 (PDF) - Holt Integrated Circuits

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HI-8582

ARINC 429 System on a Chip

Holt Integrated Circuits 

HI-8582, HI-8583

TIMING DIAGRAMS (cont.)

STATUS REGISTER READ CYCLE

BYTE SELECT SEL

RSR

DATA BUS

DON'T CARE

tSELEN

tENDATA

tENSEL

DON'T CARE

DATA VALID

tDATAEN

CONTROL REGISTER READ CYCLE

BYTE SELECT SEL

RSR

DATA BUS

DON'T CARE

tSELEN

tENDATA

tENSEL

DON'T CARE

DATA VALID

tDATAEN

CWSTR

DATA BUS

PL1 or PL2

tCWSTR

LABEL MEMORY LOAD SEQUENCE

tCWSET

Set CR1=1

tCWHLD

Label #1

tDWSET

Label #2

tDWHLD

tPL

tLABEL

CWSTR

tCWSTR

EN1 or EN2

DATA BUS

tCWHLD

tCWSET

Set CR1=1

tENDATA

LABEL MEMORY READ SEQUENCE

tREADEN

Label #1

tDATAEN

Label #2

Label #16

Set CR1=0

Label #16

Set CR1=0

HOLT INTEGRATED CIRCUITS

9

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