Equivalent Circuits–AD6640
tA
AIN
N
ANALOG
INPUTS
AIN
ENCODE INPUTS
(ENCODE)
DIGITAL OUTPUTS
(D11–D0)
tOD
N+1
N–2
N–1
N
Figure 1. Timing Diagram
VCH AVCC
AIN
450⍀
VCL
VCH AVCC
450⍀
AIN
BUF
BUF
BUF
T/H
VREF
T/H
VCL
Figure 2. Analog Input Stage
DVCC
CURRENT
MIRROR
VREF
DVCC
D0–D11
AVCC
ENCODE
AVCC
R1
17k⍀
R2
8k⍀
TIMING
CIRCUITS
R1
17k⍀
R2
8k⍀
AVCC
ENCODE
Figure 3. Encode Inputs
AVCC
VREF
AVCC
AVCC
CURRENT
MIRROR
C1
Figure 4. Compensation Pin, C1
CURRENT
MIRROR
Figure 5. Digital Output Stage
2.4V
AVCC
AVCC
0.5mA
VREF
Figure 6. 2.4 V Reference
REV. 0
–7–