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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

SI4735-D60-GUR 데이터 시트보기 (PDF) - Silicon Laboratories

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제조사
SI4735-D60-GUR
Silabs
Silicon Laboratories 
SI4735-D60-GUR Datasheet PDF : 44 Pages
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Si4730/31/34/35-D60
8.2. Si473x-D60 SSOP
Figure 15 illustrates the PCB land pattern details for the Si473x-D60-GU SSOP. Table 20 lists the values for the
dimensions shown in the illustration.
Figure 15. PCB Land Pattern
Table 20. PCB Land Pattern Dimensions
Dimension
C
E
Min
Max
5.20
5.30
0.635 BSC
X
0.30
0.40
Y1
1.50
1.60
General:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
Solder Mask Design:
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
Stencil Design:
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should
be used to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
Card Assembly:
7. A No-Clean, Type-3 solder paste is recommended.
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification
for Small Body Components.
38
Rev. 1.1

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