S1D13700 데이터 시트보기 (PDF) - Seiko Epson Corp

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S1D13700

Embedded Memory Graphics LCD Controller

Seiko Epson Corp 

Page 134

X42A-A-001-00

Epson Research and Development

Vancouver Design Center

Revision 0.03

• section 5.3, revised summary of configuration options table

• section 6, updated 3.3V and 5.0V DC Characteristics

• section 7, changed Capacitance load to 30pF for Host and LCD

• section 7.1.1, changed input clock pwh and pwl to 0.4Tclki

• section 7.2, moved reset timing to this section

• section 7.3.1, updated Generic Bus Direct Timing diagram and table

• section 7.3.2, updated Generic Bus Indirect Timing diagram and table

• section 7.3.3, updated MC68K Bus Direct Timing diagram and table

• section 7.3.4, updated MC68K Bus Indirect Timing diagram and table

• section 7.4, updated power save enable/display enable timing

• section 7.5, updated display timings diagrams and table

• section 9, updated clock section with diagram and moved oscillator circuit to subsection

• section 15, updated Oscillator circuit diagram and added table

S1D13700

X42A-A-001-00

Revision 1.0

Hardware Functional Specification

Issue Date: 2004/01/06

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