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PA28200CVB120 데이터 시트보기 (PDF) - Intel

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PA28200CVB120 Datasheet PDF : 55 Pages
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E
2-MBIT SmartVoltage BOOT BLOCK FAMILY
4.7 AC Characteristics—CE#-Controlled Write Operations(1, 12)—Commercial
(Continued)
Sym
tAVAV
tPHEL
tWLEL
tPHHEH
tVPEH
tAVEH
tDVEH
tELEH
tEHDX
tEHAX
tEHWH
tEHEL
tEHQV1
tEHQV2
tEHQV3
tEHQV4
tQVVL
tQVPH
tPHBR
Parameter
Prod
BV-80
BV-120
VCC 3.3 ± 0.3V(9) 5V±10%(11) 3.3 ± 0.3V(9) 5V±10%(11) Unit
Load 50 pF
100 pF
50 pF
100 pF
Notes Min Max Min Max Min Max Min Max
Write Cycle Time
150
80
180
120
ns
RP# High Recovery to
CE# Going Low
0.8
0.45
0.8
0.45
µs
WE# Setup to CE# Going
0
0
0
0
ns
Low
Boot Block Lock Setup to 6,8 200
100
200
100
ns
CE# Going High
VPP Setup to CE# Going 5,8 200
100
200
100
ns
High
Address Setup to CE#
3 120
50
150
50
ns
Going High
Data Setup to CE# Going 4 120
50
150
50
ns
High
CE# Pulse Width
120
50
150
50
ns
Data Hold Time from CE# 4
0
0
0
0
ns
High
Address Hold Time from
3
0
0
0
0
ns
CE# High
WE # Hold Time from
CE# High
0
0
0
0
ns
CE# Pulse Width High
30
30
30
30
ns
Duration of Word/Byte
2,5 6
6
6
6
µs
Programming Operation
Erase Duration (Boot)
2,5,6 0.3
0.3
0.3
0.3
s
Erase Duration (Param) 2,5 0.3
0.3
0.3
0.3
s
Erase Duration(Main)
2,5 0.6
0.6
0.6
0.6
s
VPP Hold from Valid SRD 5,8
RP# VHH Hold from
6,8
Valid SRD
Boot-Block Lock Delay
7,8
0
0
0
0
ns
0
0
0
0
ns
200
100
200
100 ns
SEE NEW DESIGN RECOMMENDATIONS
41

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