PRELIMINARY
DATA SHEET
PMC-2011402
ISSUE 1
PM4332 TE-32
HIGH DENSITY 32 CHANNEL T1/E1/J1 FRAMER
• Frames to TTC JT-G.704 multiframe formatted J1 signals. Supports the
alternate CRC-6 calculation for Japanese applications.
• Provides Red, Yellow, and AIS alarm integration.
• Supports RAI-CI and AIS-CI alarm detection and generation.
• Provides ESF bit-oriented code detection and an HDLC/LAPD interface for
terminating the ESF facility data link.
• Provides Inband Loopback Code generation and detection.
• Indicates signaling state change, and two superframes of signaling debounce
on a per-DS0 basis.
• Provides an HDLC interface with 128 bytes of buffering for terminating the
facility data link.
• Provides performance monitoring counters sufficiently large as to allow
performance monitor counter polling at a minimum rate of once per second.
Optionally, updates the performance monitoring counters and interrupts the
microprocessor once per second, timed to the receive line.
• Provides an optional elastic store, which may be used to time the ingress
streams to a common clock and frame alignment in support of a H-MVIP
interface.
• Provides DS-1 robbed bit signaling extraction and insertion, with optional data
inversion, programmable idle code substitution, digital milliwatt code
substitution, bit fixing, and two superframes of signaling debounce on a per-
channel basis.
• A pseudo-random sequence user selectable from 27 –1, 211 –1, 215 –1 or 220 –
1, may be detected in the T1 stream in either the ingress or egress directions.
The detector counts pattern errors using a 16-bit non-saturating PRBS error
counter. The pseudo-random sequence can be the entire T1 or any
combination of DS0s within a framed T1.
• Frames in the presence of and detects the “Japanese Yellow” alarm.
• Supports the alternate CRC-6 calculation for Japanese applications.
• Provides external access for up to three de-jittered recovered T1 clocks.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR THE INTERNAL USE OF ITS CUSTOMERS
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