M68HC11KA 데이터 시트보기 (PDF) - Motorola => Freescale
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M68HC11KA Datasheet PDF : 68 Pages
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CFORC — Timer Compare Force
$000B
Bit 7
6
5
4
3
2
FOC1 FOC2 FOC3 FOC4 FOC5
—
RESET:
0
0
0
0
0
0
1
Bit 0
—
—
0
0
FOC[5:1] — Force Output Comparison
When the FOC bit associated with an output compare circuit is set, the output compare circuit immedi-
ately performs the action it is programmed to do when an output match occurs.
0 = Not affected
1 = Output x action occurs
Bits [2:0] — Not implemented
Always read zero
OC1M — Output Compare 1 Mask
$000C
Bit 7
6
5
4
3
2
OC1M7 OC1M6 OC1M5 OC1M4 OC1M3
—
RESET:
0
0
0
0
0
0
Set bit(s) to enable OC1 to control corresponding pin(s) of port A
1
Bit 0
—
—
0
0
Bits [2:0] — Not implemented
Always read zero
OC1D — Output Compare 1 Data
$000D
Bit 7
6
5
4
3
2
1
Bit 0
OC1D7 OC1D6 OC1D5 OC1D4 OC1D3
—
—
—
RESET:
0
0
0
0
0
0
0
0
If OC1Mx is set, data in OC1Dx is output to port A bit x on successful OC1 compares.
Bits [2:0] — Not implemented
Always read zero
TCNT — Timer Count
$000E, $000F
$000E Bit 15 14
13
12
11
10
9
Bit 8 High TCNT
$000F Bit 7
6
5
4
3
2
1
Bit 0 Low
TCNT resets to $0000. In normal modes, TCNT is read-only.
TIC1–TIC3 —Timer Input Capture
$0010–$0015
$0010 Bit 15
14
13
12
11
10
$0011 Bit 7
6
5
4
3
2
$0012 Bit 15
14
13
12
11
10
$0013 Bit 7
6
5
4
3
2
$0014 Bit 15
14
13
12
11
10
$0015 Bit 7
6
5
4
3
2
TICx not affected by reset
9
Bit 8 High TIC1
1
Bit 0 Low
9
Bit 8 High TIC2
1
Bit 0 Low
9
Bit 8 High TIC3
1
Bit 0 Low
MOTOROLA
54
MC68HC11KA4
MC68HC11KA4TS/D
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