M27V801-150N6TR 데이터 시트보기 (PDF) - STMicroelectronics

부품명

상세내역

제조사

M27V801-150N6TR

8 Mbit (1Mb x8) Low Voltage UV EPROM and OTP EPROM

STMicroelectronics 

Figure 7. Programming and Verify Modes AC Waveforms

M27V801

A0-A19

Q0-Q7

VCC

GVPP

E

tAVEL

DATA IN

tQVEL

VALID

tEHQX

DATA OUT

tEHAX

tEHQZ

tVCHEL

tEHVPX

tELQV

tVPHEL

tVPLEL

tELEH

PROGRAM

VERIFY

AI01270

Figure 8. Programming Flowchart

VCC = 6.25V, VPP = 12.75V

SET MARGIN MODE

n=0

NO

++n

= 25

YES

E = 50µs Pulse

NO

VERIFY

YES

++ Addr

FAIL

Last NO

Addr

YES

RESET MARGIN MODE

CHECK ALL BYTES

1st: VCC = 6V

2nd: VCC = 4.2V

AI01271B

PRESTO IIB Programming Algorithm

PRESTO IIB Programming Algorithm allows the

whole array to be programmed with a guaranteed

margin, in a typical time of 52.5 seconds. This can

be achieved with STMicroelectronics M27V801

due to several design innovations to improve pro-

gramming efficiency and to provide adequate mar-

gin for reliability. Before starting the programming

the internal MARGIN MODE circuit is set in order

to guarantee that each cell is programmed with

enough margin. Then a sequence of 50µs pro-

gram pulses are applied to each byte until a cor-

rect verify occurs. No overprogram pulses are

applied since the verify in MARGIN MODE pro-

vides the necessary margin.

Program Inhibit

Programming of multiple M27V801s in parallel

with different data is also easily accomplished. Ex-

cept for E, all like inputs including GVPP of the par-

allel M27V801 may be common. A TTL low level

pulse applied to a M27V801’s E input, with VPP at

12.75V, will program that M27V801. A high level E

input inhibits the other M27V801s from being pro-

grammed.

Program Verify

A verify (read) should be performed on the pro-

grammed bits to determine that they were correct-

ly programmed. The verify is accomplished with G

at VIL. Data should be verified with tELQV after the

falling edge of E.

9/16

Share Link: