NCP1254ASN65T1G 데이터 시트보기 (PDF) - ON Semiconductor

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NCP1254ASN65T1G

Current-Mode PWM Controller for Off-line Power Supplies featuring Peak Power Excursion

ON Semiconductor 

NCP1254

Let us assume that we have the following converter

characteristics:

Vout = 19 V

Vin = 85 to 265 V rms

N1 = Np:Ns = 1:0.25

N2 = Np:Naux = 1:0.18

Given the turns ratio between the primary and the

auxiliary windings, the on−time voltage at high line

(265 Vac) on the auxiliary winding swings down to:

Vaux + −N2Vin,max + −0.18 375 + −67.5 V (eq. 7)

Peak current setpoint

To obtain a level as imposed by Equation 6, we need to

install a divider featuring the following ratio:

Div

+

0.16

67.5

[

2.4

m

(eq. 8)

If we arbitrarily fix the pull−down resistor ROPPL to 1 kW,

then the upper resistor can be obtained by:

ROPPU

+

67.5 * 0.16

0.16ń1 k

[

421

kW

(eq. 9)

If we now plot the peak current set point obtained by

implementing the recommended resistor values, we obtain

the following curve (Figure 33):

100%

80%

Vbulk

375

Figure 33. The peak current regularly reduces down to 20% at 375 V dc.

The OPP pin is surrounded by Zener diodes stacked to

protect the pin against ESD pulses. These diodes accept

some peak current in the avalanche mode and are designed

to sustain a certain amount of energy. On the other side,

negative injection into these diodes (or forward bias) can

cause substrate injection which can lead to an erratic circuit

behavior. To avoid this problem, the pin is internal clamped

slightly below –300 mV which means that if more current is

injected before reaching the ESD forward drop, then the

maximum peak reduction is kept to 40%. If the voltage

finally forward biases the internal zener diode, then care

must be taken to avoid injecting a current beyond –2 mA.

Given the value of ROPPU, there is no risk in the present

example. Finally, please note that another comparator

internally fixes the maximum peak current set point to 0.8 V

even if the OPP pin is adversely biased above 0 V.

Frequency Foldback

The reduction of no−load standby power associated with

the need for improving the efficiency, requires a change in

the traditional fixed−frequency type of operation. This

controller implements a switching frequency foldback when

the feedback voltage passes below a certain level, Vfold, set

around 1.9 V. Below this point, the frequency no longer

changes and the feedback level still controls the peak current

setpoint. When the feedback voltage reaches 1 V, the peak

current freezes to (250 mV or »31% of the maximum 0.8−V

setpoint). If the power continues to decrease, the part enters

skip cycle at a moderate peak current for the best noise−free

performance in no−load conditions. Figure 34 depicts the

adopted scheme for the part.

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