
NB100EP223
VPP
VIHCMR
VCC(LVPECL)
VIH(DIFF)
VIL(DIFF)
VPP
GND
VCCO(HSTL)
VIH(DIFF)
VX
VIL(DIFF)
GND
Figure 4. LVPECL Differential Input Levels
Figure 5. HSTL Differential Input Levels
Q
Z = 50 W
HSTL OUTPUT Q
50 W
50 W
GROUND
Figure 6. HSTL Output Termination and AC Test Reference
CLK
CLK
OE
Q
Q
Figure 7. Output Enable (OE) Timing Diagram
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