MT48LC16M4A2TG-6 데이터 시트보기 (PDF) - Micron Technology

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MT48LC16M4A2TG-6

64Mb: x4, x8, x16 SDRAM

Micron Technology 

64Mb: x4, x8, x16

SDRAM

WRITE – FULL-PAGE BURST

T0

CLK

T1

tCL

tCH

tCKS tCKH

CKE

tCMS tCMH

COMMAND

ACTIVE

NOP

T2

tCK

WRITE

DQM /

DQML, DQMH

A0-A9, A11

tAS tAH

ROW

tAS tAH

A10

ROW

BA0, BA1

tAS tAH

BANK

tCMS tCMH

COLUMN m 1

BANK

DQ

tRCD

tDS tDH

DIN m

T3

NOP

T4

NOP

T5

( ( Tn + 1

))

((

))

((

))

((

))

((

))

NOP ( (

))

NOP

((

))

((

))

Tn + 2

Tn + 3

BURST TERM

NOP

((

))

((

))

((

))

((

))

((

))

((

))

tDS tDH

DIN m + 1

tDS tDH

DIN m + 2

tDS tDH

((

))

DIN m + 3 ( (

))

tDS tDH

DIN m - 1

tDS tDH

256 (x16) locations within same row

512 (x8) locations within same row

1,024 (x4) locations within same row

Full-page burst does

not self-terminate. Can

use BURST TERMINATE

command to stop.2, 3

Full page completed

DON’T CARE

TIMING PARAMETERS

SYMBOL*

tAH

tAS

tCH

tCL

tCK(3)

tCK(2)

tCKH

-6

-7E

-75

-8E

MIN MAX MIN MAX MIN MAX MIN MAX UNITS

1

0.8

0.8

1

ns

1.5

1.5

1.5

2

ns

2.5

2.5

2.5

3

ns

2.5

2.5

2.5

3

ns

6

7

7.5

8

ns

–

7.5

10

10

ns

1

0.8

0.8

1

ns

*CAS latency indicated in parentheses.

NOTE:

1. x16: A8, A9 and A11 = “Don’t Care”

x8: A9 and A11 = “Don’t Care”

x4: A11 = “Don’t Care”

2. tWR must be satisfied prior to PRECHARGE command.

3. Page left open; no tRP.

SYMBOL*

tCKS

tCMH

tCMS

tDH

tDS

tRCD

-6

-7E

-75

-8E

MIN MAX MIN MAX MIN MAX MIN MAX UNITS

1.5

1.5

1.5

2

ns

1

0.8

0.8

1

ns

1.5

1.5

1.5

2

ns

1

0.8

0.8

1

ns

1.5

1.5

1.5

2

ns

18

15

20

20

ns

64Mb: x4, x8, x16 SDRAM

64MSDRAM_F.p65 – Rev. F; Pub. 1/03

53

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2003, Micron Technology, Inc.

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