MH32S64PHB-8 데이터 시트보기 (PDF) - MITSUBISHI ELECTRIC

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MH32S64PHB-8

214683648-BIT (3354432- WORD BY 64-BIT)SynchronousDRAM

MITSUBISHI ELECTRIC  

Preliminary Spec.

Some contents are subject to change without notice.

MITSUBISHI LSIs

MH32S64PHB -7,-8,-10

214683648-BIT (3354432- WORD BY 64-BIT)SynchronousDRAM

SELF REFRESH

Self-refresh mode is entered by issuing a REFS command (/CS=/RAS=/CAS=L,

/WE=H, CKE=L). Once the self-refresh is initiated, it is maintained as log as CKE is

kept low.During the self-refresh mode, CKE is asynchronous and the only enabled

input , all other inputs including CK are disabled and ignored, so that power

consumption due to synchronous inputs is saved. To exit the self-refresh, supplying

stable CK inputs, asserting DESEL or NOP command and then asserting

CKE(REFSX) for longer than tSRX. After tRC from REFSX all banks are in the idle

state and a new command can be issued after tRC, but DESEL or NOP commands

must be asserted till then.

CK

/S

/RAS

/CAS

/WE

CKE

A0-11

BA0,1

Self-Refresh

Stable CK

NOP

tSRX

new command

X

00

Self Refresh Entry

Self Refresh Exit

minimum tRC

+1 CLOCK

for recovery

MIT-DS-0301-0.0

MITSUBISHI

ELECTRIC

( 28 / 55 )

11/Jan. /1999

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