MH32S64PHB-8 데이터 시트보기 (PDF) - MITSUBISHI ELECTRIC

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MH32S64PHB-8

214683648-BIT (3354432- WORD BY 64-BIT)SynchronousDRAM

MITSUBISHI ELECTRIC  

Preliminary Spec.

Some contents are subject to change without notice.

MITSUBISHI LSIs

MH32S64PHB -7,-8,-10

214683648-BIT (3354432- WORD BY 64-BIT)SynchronousDRAM

AUTO REFRESH

Single cycle of auto-refresh is initiated with a REFA(/CS=/RAS=/CAS=L,

/WE=/CKE=H) command. The refresh address is generated internally. 4096 REFA

cycles within 64ms refresh 128Mbit memory cells. The auto-refresh is performed on

4bank concurrentry. Before performing an auto-refresh, all banks must be in the idle

state. Auto-refresh to Auto-refresh interval is minimum tRC.Any command must not be

supplied to the device before tRC from the REFA command.

CK

/S

/RAS

/CAS

/WE

CKE

A0-11

BA0,1

Auto-Refresh

NOP or DESLECT

minimum tRC

Auto Refresh on All Banks

Auto Refresh on All Banks

MIT-DS-0301-0.0

MITSUBISHI

ELECTRIC

( 27 / 55 )

11/Jan. /1999

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