MCP3901A1-I 데이터 시트보기 (PDF) - Microchip Technology

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MCP3901A1-I

Two-Channel Analog Front End

Microchip Technology 

MCP3901

Functional Block Diagram

REFIN/OUT+

REFIN -

CH0+

CH0-

CH1+

CH1-

Voltage VREFEXT

Reference

+

-

VREF

AVDD

DVDD

AMCLK

DMCLK/DRCLK

Clock

Generation

Xtal Oscillator

MCLK

OSC1

OSC2

VREF- VREF+ ANALOG DIGITAL

SINC3

+

DMCLK

DATA_CH0<23:0>

OSR<1:0>

PRE<1:0>

-

PGA

Δ -Σ

Modulator

Φ

Phase PHASE <7:0>

Shifter

Digital SPI

Interface

+

-

PGA

Δ -Σ

Modulator

SINC3

DATA_CH1<23:0>

DR

SDO

RESET

SDI

SCK

CS

POR

AVDD

Monitoring

DUAL DS ADC

SDN<1:0>, RESET<1:0>, GAIN<7:0>

MOD<7:0>

POR

MODOUT<1:0>

Modulator

Output Block

MDAT0

MDAT1

AGND

DGND

DS22192D-page 2

© 2011 Microchip Technology Inc.

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